Bonfring International Journal of Power Systems and Integrated Circuits
Online ISSN: 2277-5072 | Print ISSN: 2250-1088 | Frequency: 4 Issues/Year
Impact Factor: 0.651 | International Scientific Indexing(ISI) calculate based on International Citation Report(ICR)
Built-In Jitter Measurement Circuit Using Multi-Phase Sampler for Clock Generator
S. Pradeepa and Dr.M. Jagadeeswari
Abstract:
This paper proposes a Built-In Jitter measurement (BIJM) circuit with the modified time amplifier and multiphase sampler (MPS) to achieve high timing resolution. The proposed method uses the calibration technique, the gain variation of modified TA and the timing resolution variation of Multi Phase Sampler (MPS) to achieve a high timing resolution in clock generator. The proposed MPS reduce the area by reducing the number of delay cells much more than conventional delay lines. The Sense Amplifier Delay Flip-Flop (SA DFF) uses the bulk input to reduce the sampling time in order to achieve accurate output signal measurement. The self-referenced circuit with the auto calibration technique can eliminate the process variations and create a reference clock being a sampled signal. The proposed BIJM circuit consumes less timing delay which enhances the speed of the system. Hence, the overall architecture achieves the jitter improvement; area is reduced and obtains better timing resolution.
Keywords: Built-In Jitter Measurement Circuit (BIJM), Time Amplifier (TA), Vernier Ring Oscillator (VRO), Modified Time Amplifier (TA), Multiphase Sampler (MPS), Sense Amplifier Delay Flip-Flop (SA DFF)
Volume: 2 | Issue: Special Issue on Communication Technology Interventions for Rural and Social Development
Pages: 152-155
Issue Date: February , 2012
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