Bonfring International Journal of Research in Communication Engineering

Impact Factor: 0.528 | International Scientific Indexing(ISI) calculate based on International Citation Report(ICR)


Simulation Results for a Crosstalk Avoidance and Low Power Coding Scheme for System on Chips

Anitta Thomas and Shinoj J Vattakuzhi


Abstract:

The major problems associated with System-on-Chip buses are Delay problem, Power problem and Reliability problem. Capacitive crosstalk hublot replicas de relojes and high power consumption due to various capacitances are the major causes of this problem. So, inorder to avoid these problems, a coding scheme is proposed which avoids crosstalk, reduces power consumption and increases reliability. This involves design of encoder and decoder modules. VHDL simulation of encoder and decoder modules are done using GHDL simulator.

Keywords: Bus-invert, Crosstalk, Correlated Switching, Forbidden Pattern

Volume: 6 | Issue: 1

Pages: 01-05

Issue Date: February , 2016

DOI: 10.9756/BIJRCE.10444

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